MSE PRO 4 inch Silicon-on-Insulator (SOI) Wafer (Device: 2μm; Box: 1μm)
MSE PRO™ 4 inch Silicon-on-Insulator (SOI) Wafer (Device: 2μm; Box: 1μm)
Silicon-on-Insulator (SOI) wafer is a structure including the device layer (top), buried oxide layer (middle), and handle wafer (bottom). This technology allows for the continuous miniaturization of microelectronic devices. It has several advantages over a traditional silicon wafer, like low leakage currents and parasitic capacitance. It is used in various applications, including MEMS, sensors, telecommunications, and power devices. For example, the researchers at Toyota Central R&D Labs proposed simple T-shaped support as a solution to the tilt deformation caused by the residual stress. This solution could potentially allow for the development of high-precision sensors and actuators.
Types of SOI Wafers:
SIMOX: Device Layer Thickness < 250nm
BESOI: Device Layer Thickness between 1 μm ~ 300μm
SIMBOND: Device Layer Thickness < 200nm
Smart-Cut: Device Layer Thickness < 1.5μm
Specification:
Parameter | Specification Range |
Diameter | 100 ± 0.5mm |
Device Layer | |
Thickness | 2 ± 0.5 μm |
Type/Dopant | N / Phosphorous |
Orientation | (100) ± 1 |
Box Layer | |
Thickness | 1 μm ± 10% |
Handle Wafer | |
Thickness | 300 ± 15 μm |
Orientation | (100) ± 1 |
Type | N / Phosphorous |
Resistivity | 1 ~ 100 ohm.cm |
Backside | Finished with oxide |
Quantity | 1 piece |
*The figure is for reference only. The actual product may look different due to configuration difference.
Please contact us for customized SOI wafer.
References: