Silicon on Sapphire (SOS) wafers usually comprised of R-Plane (1102) sapphire wafers with a deposited layer of silicon on their polished surface. The sapphire wafer at the bottom of the structure has high permittivity, which can reduce the leakage current, parasitic components, and power consumption. Combining the advantage of silicon and sapphire, SOS wafer provides outstanding isolation and reduces the parasitic capacitance at the bottom of the PN junction. SOS wafers outperforms Silicon-on-Insulator (SOI) wafer when used in mobile devices and other electronics, where low power consumption and resistance to radiation is required. It is often used in various  integrated circuits, including large scale integrated circuits and radio frequency integrated circuits (RFIC).

Specification:

Substrate: